The present invention relates to bus section protection in a power system network, and more particularly, to a bus differential relay which is governed by current transformer generated current signals of a plurality of feeder lines coupled to the bus section to protect the bus section from an internal fault by interrupting current through the plurality of feeder lines and to safeguard against current interruption from a false indication of an internal fault caused by an external fault on at least one of the feeder lines of the plurality with the corresponding current transformer being saturated during a portion of the periods of the alternating current thereof.
In a power system network, a bus section is used to conduct alternating current between a plurality of feeder lines coupled thereto. A schematic illustration of such an arrangement is depicted in FIG. 1 with the bus section denoted by the solid line 10 and the feeder lines denoted by the solid lines 11-16. Each feeder line 11-16 may include a current transformer 17-22, respectively, for measuring instantaneously the alternating current therethrough. Each current transformer generates a signal representative of the alternating current of its corresponding feeder line in both amplitude and periodicity, but has a limited current amplitude measurement capacity beyond which saturation thereof occurs which results in the loss of its generated signal. Each feeder line 11-16 may also include a conventional circuit breaker unit (depicted as rectangular blocks labeled CB) 23-28, respectively, for interrupting the current thereof when activated.
Typically, different bus protection is performed by comparing all of the current signals of the feeder lines that connect to the bus section. If all of the current signals from the current transformers 17-22, for example, sum to zero or near zero, i.e. no differential signal, the bus section 10 is considered balanced and without a fault on it. However, should the bus section 10 incur an internal fault such as that shown by the short circuit to ground potential at 30, the current sum is caused to be unbalanced resulting in a differential signal of sufficient amplitude to indicate that an internal fault exists.
An external fault on a feeder line such as that shown at 32 on feeder line 16 in FIG. 2 should ideally effect a zero or near zero differential current signal because the currents of the feeder lines 11-16 of the bus section 10 remain balanced. However, in practice, the current transformers of the feeder lines are limited in their current amplitude measurement capacity. Accordingly, saturation may occur on the faulted feeder line current transformer 22, for example, because it is carrying the combined short circuit currents of all of the other feeder lines connected to the bus section 10. This condition is exemplified by the illustrated waveforms A, B and C of FIG. 3.
Referring to FIG. 3, the waveform A represents a composite of the current signals of the feeder lines 11-15 while waveform B represents the current signal of the faulted feeder line 16. The zero or near zero portions 40 of the waveform B represent the portions of the current transformer measurement during which saturation occurs. Waveform C is the summation of the current waveforms A and B or the differential signal which is used to detect an internal fault. Corresponding to the times 40 during which current transformer saturation is occurring, the differential signal deviates from its zero or near zero amplitude value as shown by the waveforms at 42. If the amplitude deviations 42 are left uncompensated, they will result in a false indication of an internal fault rendering activation of the breaker units 23-28 and consequent interruption of current through the bus section 10.
Some relay manufacturers have proposed relay designs to overcome the aforementioned drawback with respect to the current transformer saturation during an external fault on a feeder line. An example of such a proposal is disclosed in the U.S. Pat. No. 4,502,086; entitled "Differential Protective Relay"; issued Feb. 26, 1985 to Toshinobu Ebisaka. The Ebisaka patent proposes using the outputs of the feeder line current transformers with diodes and a resistor network to provide three components to determine whether an internal or external fault exists. One component is the sum of currents delivered to the bus, another is the sum of currents exiting the bus, and the third is the sum of both of these currents or the net sum of currents through the bus section. The Ebisaka implementation appears somewhat overly complicated in its design using the philosophy or inhibiting the trip signal during no fault or external fault/saturated current transformer conditions and suppressing the inhibit signal during an actual internal fault condition.
The present invention overcomes the complications of the Ebisaka proposed relay and offers a much simpler embodiment to distinguish between actual internal fault conditions and external fault with current transformer saturation conditions.